AMD Begins Production of 2nm 'Venice' EPYC Processors
AMD has commenced production of its 6th Generation AMD EPYC™ CPUs, known as “Venice,” representing a significant step forward in the collaboration between AMD and TSMC utilising 2nm process technology. This marks a key milestone as Venice is the first High-Performance Computing (HPC) product globally to reach production ramp on TSMC’s advanced 2nm technology.
The move comes as demand surges for accelerated AI infrastructure, particularly driven by the increasing use of agentic AI workloads. These workloads require substantial processing power and efficient memory access, areas where the new EPYC processors aim to excel.
AMD's commitment to 2nm product expansion continues with “Verano,” a successor to “Venice.” Verano builds on the foundation laid by Venice, incorporating industry-leading integration of LPDDR memory to address the growing demands of agentic AI applications. This focus on LPDDR integration is designed to optimise performance and efficiency for memory-intensive workloads.
The production ramp of Venice signifies AMD’s ongoing efforts to lead in advanced processor technology and meet the evolving needs of the HPC and AI markets. The partnership with TSMC demonstrates a shared commitment to pushing the boundaries of semiconductor manufacturing and delivering cutting-edge solutions to customers.
